1. Field of the Invention
This application claims priority to Indian Application No. 2727/DEL/2011 filed 20 Sep. 2011, the entire contents of which are incorporated herein by reference.
The field of the invention relates to counters and in particular to generating a count value from a slow incrementing counter and a faster clock signal.
2. Description of the Prior Art
Counters that provide count values that increment in response to a clock signal are known. These count values can be used as an indication of a current time provided that the clock signal driving the counter has a constant frequency that is known.
In data processing systems it is often useful, for example when diagnosing a system, to know the relative time that certain events happened with respect to other events. In order to be able to determine this count values that are used as timestamps can be added to various transactions as they pass through a data processing system. However, as data processing systems get larger and have different clock frequency domains, and indeed domains that are clocked at frequencies that vary with time, it is difficult to provide a timestamp that is consistent across a system.
A further constraint associated with the provision of timestamp information is the power demands associated with such provision. Timestamps that are generated for debug purposes for example, require a relatively high clock frequency in order to provide sufficiently high resolution, however as the time value is required to run continuously a high frequency clock will clearly consume significant power.
It would be desirable to be able to provide a count value in response to a local clock signal that could be related to a count value generated in response to a different local clock signal. It would also be desirable to be able to reduce the power associated with the generation of such count values.